Designing Parallel Arrays of DCMs for High-Power Applications

July 3, 2015
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Paralleling the outputs of converters allows for more current to be delivered to meet the needs of higher-power loads. With many converters, however, it is not possible to simply connect the outputs together. Challenges that power system designers face when paralleling outputs include ensuring that the current load is shared equally between the converters to maximize the output power available, and preventing large currents circulating between outputs due to slight differences in their switching frequencies.

The Vicor DC Converter Modules (DCMs) are designed to simplify output paralleling, as the functionality required is built into the components, making the operation of each DCM in the array nearly identical to that of a single DCM circuit.

Typical Parallel DCM Circuit (click to enlarge)

Figure 1 – Typical Parallel DCM Circuit

 

DCMs Simplify Current Sharing

Current sharing depends upon the output setpoints and load lines for each DCM. Although desirable to optimize current sharing, particularly to maximize efficiency by operating each DCM at the lowest possible temperature, it’s not critical to match the output setpoints, as the DCMs will operate without damage even when there is a large sharing imbalance. Small setpoint errors, however, have a minimal impact as the load line will have a bigger contribution to determining the operating point of the output, and the negative temperature coefficient of the DCMs will also tend to compensate for small current sharing imbalances.

 

Designing Support Circuitry and PCB Layout

Designing parallel arrays of DCMs is really easy. Each DCM in an array should have an output inductor placed after its local output capacitor to suppress beat frequencies that can be generated with DCM interconnected outputs and decouple each DCM and its local output capacitor from any bulk load capacitor as well as the local capacitors of other DCMs in the array. Decoupling the outputs in this way prevents the need to limit the total load capacitance, including the capacitance on the output of each DCM, to the COUT-EXT range of a single DCM.

In most cases, it’s not critical to match the trace impedances of the DCMs in an array, as the DCM load line behaves as a series resistance which tends to trump any real series resistive effects of the PCB, assuming good design practices are followed.

An input decoupling network is needed to facilitate paralleling. Each DCM needs a separate input filter; additionally, for applications that require common mode noise rejection on the input, a common mode choke should be added to the input side of each DCM.

High frequency interference on the control signals can be avoided with filtering on the TR and EN pins. A typical filter circuit, which uses a resistor to decouple the pin from the capacitor and avoid the potential resonant tank that could be created between the capacitor, the lead inductance, and the internal bypass capacitor.

Filtering circuit for EN and TR pins

Figure 2 – Filtering circuit for EN and TR pins (click to enlarge)

 

Because of their open-drain structure, the FT (fault) pins can be directly bussed with a single pull-down resistor.

 

Dealing with Start-up

For resistive loads, there is no need for any extra circuitry to control start up: although the DCMs will not all turn on at the same time, if the load current exceeds the capability of the active DCMs, they will simply go into current limit until there are enough active DCMs to provide the full load current, allowing all DCMs can operate normally. Constant current loads, however, could cause the output voltage to collapse during start up because of the delay between units, but this easily be avoided by using EN to start the DCMs, which ensures that the turn-on delay between DCMs is smaller than the current limit delay of one DCM.

 

More Information

Detailed design information, including information on the calculation of the values for the additional components, and analysis of special situations, such as high-temperature operation, is provided in Application Note AN30: Parallel DCMs.

 

 

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