Output Line Ripple on Power Factor Corrected AC-DC Power Supply Outputs (Part 6)

This is the sixth in a series of blog posts by Harry Vig, Principal Applications Engineer at Vicor. To go to Output Line Ripple on Power Factor Corrected AC-DC Power Supply Outputs (Part 1) click here.

What about the real line ripple, with its associated nonlinearity?

Reverting back to a balanced system, but with the effect of the dead time, I got a surprising result.

First, let’s examine the simulation schematic. All three sources have been changed to the same amplitudes and offsets as in the single phase case above to create the same output current wave shape with dead time:


Figure 16 – Three-Phase Model with Dead Time

Each interval when the AC/DC converter sits idle creates a perturbation that results in ripple current. Because it occurs with each of three phases in succession, the frequency at which the perturbations are presented to the output bus and the bulk capacitor is 6x the input line frequency, in this case 300Hz.

What I didn’t expect is the shape of the capacitor current. Plotted on the same axes as the three converter output stages, the capacitor current completes the sinusoidal cycle portion which DURING the dead time portion of the output current. The output ripple is thus proportional to the period of the cycle during which the converter stays idle to improve efficiency.


Figure 17 – Impact of Dead Time on Capacitor Current

Back to the variables of interest, the 48V bus ripple voltage, at 0.12V, and ripple current in the bulk capacitor, 0.5Arms, due to the idle time are both negligible compared to the effect of phase imbalance.


Read part seven of this series: Bulk Capacitor Ripple with Missing Phases.

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