My Journey: Rapid Prototyping of a Cell-Based, High Performance, High Power DC-DC Converter (part 1)

Have you ever wondered what an applications engineering job entails? This post is about a recent project I undertook; a journey through prototyping a cell-based demo kit for a high performance DC-DC converter, taking me from desk to demo lab in five working days.

One Monday morning, I settled down at my desk to read a trip report a colleague had sent me. There were two pages of facts gleaned during a four-hour meeting with a client, addressing technical requirements for a well-funded, long-term project. Whilst I could have simply suggested some components that the customer might choose, I was so convinced that Vicor products would provide the best solution that I decided to build a circuit demo for this project. There’s nothing more convincing than seeing something working on a lab bench!

I set about designing the demo, sketching out a block diagram of the power array demonstrator. It would take in DC at high voltage (240 – 330 V DC) and buck down to 28 V, delivering 2.6 kW of power. They’re reasonable requirements, but the only problem was that a demo date had been scheduled for just 10 days’ time…

Power Array Static Test Setup

The sketch showed a simple system-level realization of the project; modularity was one of the key goals. By sharing local connections with neighbors, the power modules could form a composite power conversion function. Using our power components reminded me of IC design, where great effort is devoted to the design of cells that simultaneously meet layout and functionality goals. These are then set in a library to be deployed by an IC systems architect. IC folks call this “managing complexity”.

Having considered various options, I concluded that the interleaved buck converter appeared to be the architecture of choice for this high current DC-DC application . It has a fairly compact footprint, but there is a need to place several peripheral components: power transistors, their driver modules, other discretes like magnetics (a design inside a design) and capacitors. They also have to be connected carefully to make small, dense layouts that keep the power current loops to a minimum size around the controllers.

Instead of trying to make do with a mixed bag of components and controllers, I worked up my demo’s second stage with self-contained, functional blocks, Vicor PRMs (Pre-Regulator Modules). One challenge with these designs is sharing load current: how could I ensure that they do just that? Another issue to consider is control of several paralleled devices: how many PRMs could I put on the current-sharing PR (Primary Control) bus without overloading it?

The PRMs are VI Chips, which look like silicon chips, although they are encapsulated assemblies of components. The engineering complexities have been addressed inside each package. The PRMs I selected deliver 400 W each to a load at 48 V DC, and can be easily configured in parallel to deliver higher power. A master PRM can be hard-wire programmed, then set amongst a group of subordinate PRMs to make an orderly power array (see Figure). The master module sets the static and dynamic performance criteria that will be seen in the composite regulator. The master PRM exerts control over the PRM power array by transmitting a low-level DC voltage on the current sharing PR bus.

After consulting with colleagues, I derated individual PRMs, as the output voltage set-point would be 28V, rather than 48V. Each PRM can only deliver 28/48 or 58% of its full power capability in this instance. I figured that using 12 PRMs in the array would give me a power output of 12x400x0.58=2.78 kW, just enough to meet the target for the demo of 2.4 to 2.6 kW.

I will tell you the plan I came up with to meet this target and the countdown to D-day (Demo-day) in the next installment.

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