Techniques to Deal with Beat Frequencies Caused by Paralleling DC-DC Converters

December 6, 2013
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Power system designers are frequently required to develop solutions that provide more power than can be delivered by a single converter. Paralleling is a common technique, where the outputs of more than one converter are linked together to increase output current, and therefore output power.

One problem with this approach is the generation of beat frequencies on the inputs of the converters. Although there are families of synchronous converters, which lock their switching to the same frequency, the range of devices is limited, so frequently engineers choose to parallel non-synchronous converters. Although each device in the parallel array is specified to switch at the same nominal frequency, inevitably there are slight differences in the switching frequencies, which lead to beat frequencies that increase the ripple currents in the input section of the converters.

High ripple currents increase losses, stress the input capacitors and can increase system noise. In some cases the ripple can have sufficient amplitude to interfere with the operation of the converters: for example causing a module to erroneously detect an overcurrent condition.

To help power designers who are developing systems using paralleled DC-DC converters, we’ve written a white paper that examines the problem of beat frequencies using measurements from a real system. It shows that the problem of beat frequencies can be mitigated easily by adding input filtering. Inductors are added to the system, and the amplitude of the ripple current is reduced by more than 80%.

To learn more about the challenges of paralleling DC-DC converters, and the solutions to reduce input ripple current, register now to read our white paper, “Mitigating Undesired Input Beat Frequencies in Parallel DC-DC Converter Arrays”.

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