Boosting Energy Efficiency in Power Converters

August 16, 2012
Stephen Oliver, VP VI CHIP Product Line

Stephen Oliver, VP VI CHIP Product Line

From lossy DC distribution buses in telecom equipments to power hungry datacenter servers and emerging aerospace systems, the quest to further cut power losses and improve the overall efficiency of power solutions in these applications is very high.

The drive for energy efficiency is pervasive and crucial to the success of the end system or the product across all industries. With this ever increasing thirst for high efficiency, energy efficient power solution is becoming a differentiating factor in modern systems. However, achieving high energy efficiency goals requires innovative strategies.

Although, the traditional AC-DC silver boxes have evolved into distributed power architectures, which have further migrated to intermediate bus architecture (IBA), in telecom equipments, server boards, and aerospace systems, to raise the efficiency bar, they have now reached a plateau. And the issue is more evident when the point-of-load (POL), such as the processor voltage on the motherboard drops below 1 V. In fact, the overall efficiency drops.

The move to higher DC bus voltage (48V or 350/380V) reduces the distribution losses but adds an extra stage of DC-DC conversion to get down to the intermediate voltage of 12 VDC before powering the low POL voltage with synchronous buck regulator, resulting in bigger size and lower conversion efficiency.

To overcome the limitations of high voltage distribution bus, European standards agency ETSI is working on a new standard, +/-190 VDC. The recent transition from 380 V DC bus voltage to +/- 190 V for the telecom DC distribution lifts the efficiency bar again. However, using the new ETSI bus voltage standard also requires additional conversion stages as shown below.

Bus Voltage Standard

Figure 1: Conversion Stages

Here again, the +/-190 VDC is converted to 48 VDC, which is then lowered to 9.6 or 12 VDC using the IBC. The efficiency gain is negligible, while it adds more components to reduce power density and increase overall cost of the solution.

Using different bus voltage rails to power a variety of POL voltages on the system motherboards is not the answer to the efficiency, space and cost problems of the modern and emerging systems. A new and innovative strategy is required that pushes the power conversion efficiency to a new high, while utilizing minimum number of conversion stages to simultaneously boost power density and cut component cost.

Vicor prefers combining efficient power components with an optimized architecture in a holistic approach. For that, the company has developed highly efficient modular building blocks called VI Chip, which can be combined with an optimized architecture like the factorized power architecture (FPA) to surmount the drawbacks of traditional high voltage rails, including the new ETSI standard, in telecom equipments, servers and aerospace systems. In essence, it can deliver power solution with unprecedented combination of power density, efficiency and flexibility.

This unique blend of high efficiency, high density and flexibility provides system designers with distinct competitive advantages. To discuss the VI Chip product range, please contact Vicor

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